Job Title: Senior RTL Design Engineer

Location: Bengaluru office (near Brookefield Mall)

Notice Period: 30-40 Days

Education: B.Tech/M.Tech in EE/CS with 9+/10 GPA (from IITs, JU, VIT) or 2+ years of RTL/ASIC design experience

Experience Required: 5-8 years

Vacancies: 2

Department: Technology

Work Mode: Office (Mon-Fri, 9 AM - 6 PM)

Reporting To: Senior Validation Lead / CTO

CTC Range:

    Fixed: 20-40 Lakhs

    Variable: According to experience

Key Responsibilities:

    RTL Logic & ASIC Design: Lead digital processing hardware design, optimizing data paths and control-intensive circuits for low-power communication SoCs.

    Verification & Debugging: Implement RTL Linting, Design Rule Checking (DRC), Clock Domain Crossing (CDC), and ASIC ECO flows for system validation.

    Cross-functional Collaboration: Work with System Architects, ASIC Designers, and Power Engineers to develop energy-efficient SoCs.

Required Skills:

    Must Have:

        Strong Verilog/VHDL skills

        RTL Logic Design & Verification

        RTL Linting, DRC, CDC, and ASIC ECO debugging experience

        Scripting & Automation (Tcl, Perl, Python)

        Power-aware SoC Design & Wireless Communication Expertise

    Specialist Skills:

        Logic design experience using Verilog or VHDL

        Understanding of ASIC FLOW

Ideal Candidate Profile:

    Degree: B.Tech

    Domain: Technology

    College Tier: Premier/Tier 1

    Should Not Have: Experience in VLSI Research Labs & High-Performance IC Design Firms

Target Companies for Recruitment:

    Product-based Semiconductor Companies (e.g., Qualcomm, Intel, AMD, Broadcom, NVIDIA)

    AI-driven Wireless Chip Startups focusing on wearable computing and ultra-low-power SoC design

Evaluation Process:

    Recruitment Rounds:

Resume Screening:

Technical Interview:

Practical Assessment:

Behavioral Interview:

Final Interview:

Reference Check:

Offer Discussion:

        Screening Questions:

            "You’ve listed experience with RTL Linting, DRC, or CDC checks. Which tools have you extensively used, and how did you leverage them for optimization?"